National Repository of Grey Literature 99 records found  1 - 10nextend  jump to record: Search took 0.01 seconds. 
Autonomous programmer of AVR microprocessors with Ethernet connectivity
Verner, Lukáš ; Daněček, Vít (referee) ; Kravka, Martin (advisor)
he main purpose of this semestral thesis is to get to know programming of Atmel AVR microcontroller, working with SD/MMC cards, working with ethernet (TCP/IP) to create a standalone programmer of AVR microcontroller with ethernet connectivity. The first part deals with the questions of programming theory of memories inside microcontrollers and description of programming algorithm. The most used programming method is called „In System Programming“ - ISP. This method provides easy and fast manipulaton. Concept of this programmer is designed for this ISP method. In this thesis is too explain how to work SD/MMC card and file systém FAT16. This knowledges are necesary to store binary program inside standalone programmer. In final part and in attachments there is hardware design, electrical scheme, bill of materials, printed circuit board.
C++ Arbitrary Precision Floating Point Library
Závada, Vladislav ; Šnobl, Pavel (referee) ; Hruška, Tomáš (advisor)
This thesis deals with the design of a floating point module, which allows to perform operations with floating point operands that have any bit width. For this purpose, the module is implemented as a template class in C ++. The module is designed to allow it to be used when designing an application-specific processor. First, the floating point number and template functions in c ++ are described. In the practical part the algorithms of the individual operations and the design of the module itself are described as template libraries.
Architecture Information for LLVM Compiler Optimizations
Svoboda, Jan ; Dolíhal, Luděk (referee) ; Hruška, Tomáš (advisor)
Tato práce se zabývá automatickou extrakcí informací o architektuře procesoru z jazyka CodAL. Získané informace jsou využity jako základ pro cenový model optimalizátoru překladače LLVM. V rámci práce vznikl nový systém, který vytváří cenový model, převádí jej do C++ kódu a sestavuje do dynamické knihovny. Tato knihovna je za běhu načtena překladačem a využita pro přesnější rozhodování o přínosech jednotlivých optimalizací. Výsledkem práce je průměrné 14% snížení velikosti strojového kódu programů a až 68% zlepšení výkonu generovaného kódu.
Automatization of Analysis of Performance and Power Consumption
Rudolf, Tomáš ; Jaroš, Jiří (referee) ; Nikl, Vojtěch (advisor)
This thesis deals with increasing efficiency of supercomputers. Higher efficiency can be achieved by reducing frequency of processor if the algorithm does not slow down significantly. This thesis presents set of scripts designed to monitor consumption of processor along with scripts that visualize these measured values. It also allows easy control of processor frequency. The created solution gives user a capability to measure given algorithm efficiency and optimize computing power of specific computer exactly for the algorithm. Due to this work the user will be informed about whether it is advantageous to run his algorithm on one or other frequency of the processor.
Computer simulator for education
Friml, Dominik ; Macho, Tomáš (referee) ; Petyovský, Petr (advisor)
This bachelor thesis is divided into several parts. The first part consists of an introduction to individual parts of a processor and some of its peripheries. Next part of thesis is a research of existing educational and demonstrative tools usable in education. Results of the research were compiled into requirements for educational system. Using those requirements, and design of an architecture for educational processor for education, not only on FEEC BUT was created. As a next step, there is described a procedure, that led to a creation of a working simulator of the designed processor. Last part of this thesis is a design of several educational exercises, that demonstrates principles of computers and programming in a machine code and an assembly language.
Control of multiple-steer vehicle
Krsek, Jiří ; Kopečný, Lukáš (referee) ; Šolc, František (advisor)
The subject matter of the bachelor thesis is a creation of functional model of mobile robot equipped with multiple-steer chassis. The robot will have its own control unit consisting of 32-bit processor and wireless communicatin unit, which enables the contact with superset system. The superset system serves as visualization interface robot - operator and enables to enter the data for requested movement of robot. The calculation of movement of each actuator is ensured by control unit of robot.
High Voltage Pulse Generator for Electroporation of Cells
Puczok, Václav ; Martiš, Jan (referee) ; Červinka, Dalibor (advisor)
The main goal of this thesis is to design control board for the experimental electroporation device and to develop control firmware. The first chapter of this work focuses on the electroporation phenomenon itself. Behaviour of the cell model in external electrical field is described there as well as simulation and overview of how electroporation affects living tissue. It also explains the main requirements for parameters of the electroporation pulses as well as need for ECG synchronization. Furthermore, some remarks are given about novel high frequency electroporation method, which involves use of nanosecond bipolar high voltage pulse bursts. The second chapter briefly introduces commercial electroporation device called Nanoknife, including control part, power part, and it's limits. The third chapter consists of introduction of the novel experimental electroporation device developed at BUT. Power part of this device is discussed as well. Next chapter focuses on design of the control board for this device and also on description of the particular schematic parts. There is a control algorithm explanation in the fifth chapter of this thesis followed by the brief manual to machine operation.
Microcontrollers programming possibilities
Šubrt, Stanislav ; Kovář, Jiří (referee) ; Houška, Pavel (advisor)
This work is focused on inner structure and programming possibilities of microcontrollers. The work goal is to describe inner structure of microcontrollers from the programmer’s point of view, find out advantages and disadvantages of their programming in Assembly language, C language and higher-level languages. Code portability between different microcontrollers’ families and architectures is discussed further.
RISC-V Processor Peripherals
Vavro, Tomáš ; Kekely, Lukáš (referee) ; Martínek, Tomáš (advisor)
The RISC-V platform is one of the leaders in the computer and embedded systems industry. With the increasing use of these systems, the demand for available peripherals for the implementations of this platform is growing. This thesis deals with the FU540-C000 processor from SiFive company, which is one of the implementations of the RISC-V architecture, and its basic peripherals. Based on the analysis, an UART circuit for asynchronous serial communication was selected from the peripherals of this processor. The aim of this master thesis is to design and implement the peripheral in one of the languages for the description of digital circuits, and then create a verification environment, through which the functionality of the implementation will be verified.
Graphical Simulator of Superscalar Processors
Vávra, Jan ; Mrázek, Vojtěch (referee) ; Jaroš, Jiří (advisor)
Práce se zabývá implementací simulátoru superskalárního procesoru. Implementace se odvíjí od existujících simulátorů a jejich chybějících částí. Simulátor umí vykonávat instrukční sadu RISC-V, ovšem je umožněno přidání jakékoli RISC instrukční sady. Simulátor má deterministickou predikci skoku. Části procesoru lze upravovat. Součástí je i editor kódu pro danou instrukční sadu.

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